• DocumentCode
    3590627
  • Title

    Performance of LRU block replacement algorithm with pre-fetching

  • Author

    Pendse, Ravi ; Bhagavathula, Ravi

  • Author_Institution
    Dept. of Electr. Eng., Wichita State Univ., KS, USA
  • fYear
    1998
  • Firstpage
    86
  • Lastpage
    89
  • Abstract
    An economical solution to the need for unlimited amounts of fast memory is a memory hierarchy, which takes advantage of locality and cost/performance of memory technologies. Most of the advanced block replacement algorithms exploit the presence of temporal locality in programs to achieve a better performing cache. A direct fallout of this approach is the increased overhead involved due to the complexity of the algorithm without any significant improvement in the cache performance. The performance of the cache could be improved if spatial locality present in the programs is further exploited. This paper presents the results of the investigation of the impact of pre-fetching techniques on the miss rates due to the basic Least Recently Used (LRU) block replacement algorithm. Simulations reveal an improvement of about 60% in the miss rates for instruction caches due to pre-fetching and a corresponding improvement of about 10% for data caches
  • Keywords
    cache storage; memory architecture; semiconductor storage; LRU block replacement algorithm; data caches; instruction caches; least recently used algorithm; locality; memory hierarchy; miss rates; pre-fetching; spatial locality; Cache memory; Costs; Delay; Hard disks; Microprocessors; Power generation economics; Random access memory; Throughput; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1998. Proceedings. 1998 Midwest Symposium on
  • Print_ISBN
    0-8186-8914-5
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1998.759441
  • Filename
    759441