DocumentCode
3590640
Title
Closed-loop adaptive and stochastic prefetch mechanism for data array
Author
Vincent, Lionel ; Mancini, Stephane
Author_Institution
PERSYVAL-Lab., Grenoble Univ., Grenoble, France
fYear
2014
Firstpage
1
Lastpage
8
Abstract
Nowadays, one of the main limiting factor in multiprocessor development is the increasing speed gap between efficient processing elements and slow main memories. To reduce this limitation, prefetching mechanisms, implemented in memory hierarchy, attempt to predict the future data needed in local memory. However, classical proposed solutions are no longer efficient for typical access sequences in the context of image processing algorithms. In this paper, a prefetching mechanism is proposed, based on the use of the index array of access rather than memory addresses. The adaptive prediction policy takes into account both application and main memory characteristics. This mechanism enhances the Cache nD-AP, formerly statically set, to improve its performance. Experiments show that the proposed adaptive strategy is able to maintain its efficiency when the characteristics of the system dynamically change.
Keywords
cache storage; multiprocessing systems; adaptive prediction policy; cache nD-AP; closed-loop adaptive mechanism; image processing algorithms; index array; memory hierarchy; multiprocessor development; stochastic prefetching mechanism; Arrays; Hardware; Image processing; Indexes; Oscillators; Prefetching; System-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Architectures for Signal and Image Processing (DASIP), 2014 Conference on
Type
conf
DOI
10.1109/DASIP.2014.7115606
Filename
7115606
Link To Document