Synthilation: JIT-compilation of microinstruction sequences in AMIDAR processors

The large expense of current chip fabrication can generally only be amortized for large manufacturing volumes. Thus, it is desirable to build adaptable chips that can be customized to the application needs after production. In this contribution we show that this adaptation is possible even without reconfigurable HW components. We propose synthilation, a new method for adapting the processor to the application requirements. It combines methods of hardware synthesis and software compilation to map high-level descriptions to hardware components of the processor. Our approach is applicable to varying degrees of reconfigurability, reaching from static microarchitectures just with writable control stores (variable microcode), to the exploitation of instruction level parallelism with multiple computational units. We consider both a practical real-world example as well as theoretical bounds on the speed-ups achievable by our method.