• DocumentCode
    3590940
  • Title

    A new technique to implement conventional as well as advanced Pulse Width Modulation techniques for multi-level inverter

  • Author

    Roy, Debanjan ; Roy, Tapas

  • Author_Institution
    Sch. of Electr. Eng., KIIT Univ., Bhubaneswar, India
  • fYear
    2014
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Depending on pole voltage levels, the inverters are broadly classified into two categories two level and above two-level. Above two-level is popularly known as multilevel inverters. Multilevel inverters have better performances compared to conventional two level inverters like minimum harmonic distortion, reduced electromagnetic interferences (EMI) and operation on several voltage levels. There exist different conventional as well as advanced PWM techniques to switch multilevel inverters. Phase Disposition PWM (PDPWM), Selective Harmonic Elimination (SHE), Space- Vector PWM (SVPWM) are most popular conventional PWM techniques whereas Bus-clamping PWM (BCPWM) techniques are one of the most popular advanced type PWM techniques. BCPWM techniques are better compare to CSVPWM technique in respect of harmonic distortion, voltage stress across switch and switching loss. In this paper, a new technique has been introduced to implement CSVPWM as well as BCPWM techniques for a 3-level inverter. The proposed technique is simple to understand and no need of mapping as that is required for conventional techniques. The performance of the inverter is analyzed using R-L load and also with three phase induction motor load. The simulation results have shown the effectiveness of the proposed technique. Further the same technique can be employed for higher level inverters.
  • Keywords
    PWM invertors; electromagnetic interference; harmonic distortion; induction motors; EMI; PWM techniques; advanced pulse width modulation techniques; bus-clamping PWM; electromagnetic interferences; harmonic distortion; multilevel inverter; phase disposition PWM; selective harmonic elimination; space-vector PWM; three phase induction motor load; voltage stress; Clamps; Inverters; Load modeling; Logic gates; Pulse width modulation; Switches; Switching frequency; Bus Clamping PWM (BCPWM); Conventional Space Vector PWM (CSVPWM); Harmonic distortion; Multi-level Inverter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics (IICPE), 2014 IEEE 6th India International Conference on
  • Print_ISBN
    978-1-4799-6045-3
  • Type

    conf

  • DOI
    10.1109/IICPE.2014.7115852
  • Filename
    7115852