Title :
GpuTejas: A parallel simulator for GPU architectures
Author :
Malhotra, Geetika ; Goel, Seep ; Sarangi, Smruti R.
Author_Institution :
Dept. of Comput. Sci., Indian Inst. of Technol., New Delhi, New Delhi, India
Abstract :
In this paper, we introduce a new Java-based parallel GPGPU simulator, GpuTejas. GpuTejas is a fast trace driven simulator, which uses relaxed synchronization, and non-blocking data structures to derive its speedups. Secondly, it introduces a novel scheduling and partitioning scheme for parallelizing a GPU simulator. We evaluate the performance of our simulator with a set of Rodinia benchmarks. We demonstrate a mean speedup of 17.33x with 64 threads over sequential execution, and a speedup of 429X over the widely used simulator GPGPU-Sim. We validated our timing and simulation model by comparing our results with a native system (NVIDIA Tesla M2070). As compared to the sequential version of GpuTejas, the parallel version has an error limited to <;7.67% for our suite of benchmarks, which is similar to the numbers reported by competing parallel simulators.
Keywords :
Java; data structures; graphics processing units; multi-threading; scheduling; GPGPU-Sim simulator; GPU architectures; GPU simulator parallelization; GpuTejas; Java-based parallel GPGPU simulator; Rodinia benchmarks; nonblocking data structures; partitioning scheme; performance evaluation; relaxed synchronization; scheduling scheme; sequential execution; timing model; trace driven simulator; Computational modeling; Computer architecture; Graphics processing units; Instruction sets; Java; Kernel; Timing; Cycle-level; GPU; Nvidia; Parallel Architectural Simulation; Simulator; Tesla; Timing model;
Conference_Titel :
High Performance Computing (HiPC), 2014 21st International Conference on
Print_ISBN :
978-1-4799-5975-4
DOI :
10.1109/HiPC.2014.7116897
