DocumentCode
3594851
Title
Digital comparator for non-algorithmic routing
Author
Peter, K.K.L. ; Tan, E.C.
Author_Institution
Sch. of Compter Eng., Nanyang Technol. Univ., Singapore, Singapore
Volume
3
fYear
2003
Firstpage
1949
Abstract
Research has proposed many algorithm-based fault-tolerant routing strategies for multiprocessor networks. Some of these incorporate hardware routing devices that execute these algorithms to effect a routing decision. The authors propose a novel digital comparator that supports non-algorithmic routing decisions in k-ary n-cube networks.
Keywords
comparators (circuits); fault tolerant computing; field programmable gate arrays; hypercube networks; large-scale systems; network routing; algorithm-based fault-tolerant routing strategies; digital comparator; hardware routing devices; k-ary n-cube networks; multiprocessor networks; nonalgorithmic routing; Adders; CMOS logic circuits; Circuit faults; Computer networks; Counting circuits; Hardware; Large-scale systems; Logic design; Propagation delay; Routing;
fLanguage
English
Publisher
ieee
Conference_Titel
Information, Communications and Signal Processing, 2003 and Fourth Pacific Rim Conference on Multimedia. Proceedings of the 2003 Joint Conference of the Fourth International Conference on
Print_ISBN
0-7803-8185-8
Type
conf
DOI
10.1109/ICICS.2003.1292807
Filename
1292807
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