DocumentCode :
3595246
Title :
A simplex algorithm for LP decoding hardware
Author :
Gensheimer, Florian ; Ruzika, Stefan ; Scholl, Stefan ; Wehn, Norbert
Author_Institution :
Optimization Res. Group, Univ. of Kaiserslautern, Kaiserslautern, Germany
fYear :
2014
Firstpage :
790
Lastpage :
794
Abstract :
An efficient LP decoder is the key building block for a maximum likelihood decoder based on integer programming. In this paper we propose to employ a variant of the simplex algorithm for LP decoding, called the dual simplex algorithm. This algorithm has two advantages: It inherently uses the received LLRs to generate a close to optimum starting solution and it allows to reuse former LP solutions if an adaptive LP decoding scheme is used. It is shown, that the dual simplex algorithm outperforms the standard (primal) simplex by a factor of 15-20 in runtime. This allows for efficient future hardware implementations. Furthermore the use of fixed-point instead of floating-point numbers is investigated to further reduce hardware complexity.
Keywords :
integer programming; linear predictive coding; maximum likelihood decoding; LP decoding hardware; floating-point numbers; hardware complexity reduction; integer programming; key building block; maximum likelihood decoder; simplex algorithm; Algorithm design and analysis; Complexity theory; Hardware; IP networks; Maximum likelihood decoding; Parity check codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Personal, Indoor, and Mobile Radio Communication (PIMRC), 2014 IEEE 25th Annual International Symposium on
Type :
conf
DOI :
10.1109/PIMRC.2014.7136272
Filename :
7136272
Link To Document :
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