DocumentCode :
3595930
Title :
Variability-aware aging modeling for reliability analysis of an analog neural measurement system
Author :
Heidmann, Nils ; Hellwege, Nico ; Paul, Steffen ; Peters-Drolshagen, Dagmar
Author_Institution :
Inst. of Electrodynamics & Microelectron. (ITEM.me), Univ. of Bremen, Bremen, Germany
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
The design and fabrication of fully-implantable neural measurement systems has been enabled by the continuous miniaturization and increasing integration density of modern CMOS technologies. The use of CMOS processes with small structure sizes benefits the energy consumption and the functionality of modern neural recording systems. However, the miniaturization increases the impact of degradation effects as well as the influence of variations. New EDA and modeling approaches have to be investigated in order to enable designers to simulate these effects already during the design phase of complex safety-critical applications. The aim of this paper is to present a new approach for the variability- and aging-aware behavioral model generation of analog components. The modeling is demonstrated on a neural amplifier topology in order to show the proposed design flow. For the investigated amplifier a simulation speedup of 110× compared to transistor level simulation could be obtained by still achieving a small error in mean value and standard deviation of the modeled performances. The variability-and aging-aware modeling is applied to an analog recording front-end as part of a neural measurement implant and enables the analysis of the expected system reliability over time. For the detection of neural action potentials a decrease in system performance of about 0.26 % due to aging influence is observed.
Keywords :
CMOS analogue integrated circuits; amplifiers; electronic design automation; integrated circuit reliability; low-power electronics; EDA approach; aging-aware behavioral model; analog neural measurement system; analog recording front-end; complex safety-critical applications; continuous miniaturization; energy consumption; fully-implantable neural measurement systems; modern CMOS technology; neural action; neural amplifier topology; neural measurement implant; neural recording systems; reliability analysis; transistor level simulation; variability-aware aging; variability-aware behavioral model; Aging; Analytical models; Degradation; Gain; Integrated circuit modeling; Reliability; Transistors; Aging; HDL; Modeling; Neural Measurement; Reliability; Variability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2015 20th IEEE European
Type :
conf
DOI :
10.1109/ETS.2015.7138753
Filename :
7138753
Link To Document :
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