DocumentCode :
3595953
Title :
On test program compaction
Author :
Gaudesi, M. ; Reorda, M. Sonza ; Pomeranz, I.
Author_Institution :
Politec. di Torino, Turin, Italy
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
While compaction of binary test sequences for generic sequential circuits has been widely explored, the compaction of test programs for processor-based systems is still an open area of research. Test program compaction is practically important because there are several scenarios in which Software-based Self-Test (SBST) is adopted, and the size of the test program is often a critical parameter. This paper is among the first to propose algorithms able to automatically compact an existing test program. The proposed solution is based on instruction removal and restoration, which is shown to significantly reduce the computational cost compared with instruction removal alone. Experimental results are reported, showing the compaction capabilities and computational costs of the proposed algorithms.
Keywords :
automatic test software; electronic engineering computing; logic testing; programming; binary test sequence; computational costs; instruction removal; instruction restoration; processor based systems; software based self-test; test program compaction; Clocks; Compaction; Computational efficiency; Computational modeling; Pipelines; Silicon; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2015 20th IEEE European
Type :
conf
DOI :
10.1109/ETS.2015.7138771
Filename :
7138771
Link To Document :
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