Two-dimensional analytical model for threshold voltage of graded-channel SOI MOSFETs

Author

Goel, Varun ; Sharma, Sanjay ; Kumar, Sanjay ; Jit, S.

Author_Institution

Dept. of Electron. Eng., Indian Inst. of Technol. (BHU), Varanasi, India

fYear

2014

Firstpage

1

Lastpage

4

Abstract

This paper presents a two-dimensional (2D) analytical model for threshold voltage of fully depleted graded-channel silicon-on-insulator (SOI) MOSFETs. The two-dimensional Poisson´s equation is solved in different channel regions with parabolic approximation by using suitable boundary conditions. The effect of different device parameters on device performance has been studied. Results confirmed that a graded-channel structure gives better immunity against Short-Channel-Effects (SCEs) in comparison to conventional SOI MOSFETs. The accuracy of the model is verified by comparing the analytical model results with the simulation results obtained by commercially available two-dimensional device simulator, ATLAS.

Keywords

MOSFET; Poisson equation; semiconductor device models; silicon-on-insulator; ATLAS two-dimensional device simulator; Si; boundary conditions; channel regions; graded-channel SOI MOSFET; parabolic approximation; silicon-on-insulator; threshold voltage; two-dimensional Poisson equation; two-dimensional analytical model; Analytical models; Electric fields; Electric potential; MOSFET; Semiconductor device modeling; Silicon-on-insulator; Threshold voltage; Drain Induced Barrier Lowering; Graded-Channel; Short-Channel-Effects; silicon-on-insulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Emerging Electronics (ICEE), 2014 IEEE 2nd International Conference on

Print_ISBN

978-1-4673-6527-7

Type

conf

DOI

10.1109/ICEmElec.2014.7151178

Filename

7151178