DocumentCode :
3596606
Title :
Influence of gate and drain bias on the bias-stress stability of flexible organic thin-film transistors
Author :
Bisoyi, Sibani ; Tiwari, Shree Prakash ; Zschieschang, Ute ; Klauk, Hagen
Author_Institution :
Centre for Inf. & Commun. Technol., Indian Inst. of Technol. Jodhpur, Jodhpur, India
fYear :
2014
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, the influence of gate-source and drain-source bias on the bias-stress stability and lifetime of pentacene-based low-voltage (-3 V) organic thin-film transistors (TFTs) built on plastic substrate has been investigated. The 10%-current-decay lifetime is used for analyzing the influence of applied bias on the bias-stress stability of TFTs, and to compare various biasing conditions. Our results show a 3 to 4 times higher 10%-current-decay lifetime when magnitude of gate-source and drain-source voltage are equal and less than 2.5 V during bias stress, compared to that when drain-source voltage is kept at -3.0 V.
Keywords :
thin film transistors; TFT; bias-stress stability; drain-source bias; drain-source voltage; flexible organic thin-film transistors; gate-source bias; gate-source voltage; plastic substrate; voltage -3 V; Dielectrics; Logic gates; Organic thin film transistors; Plastics; Substrates; 10%-current-decay lifetime; Bias-stress; flexible substrate; organic TFTs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Electronics (ICEE), 2014 IEEE 2nd International Conference on
Print_ISBN :
978-1-4673-6527-7
Type :
conf
DOI :
10.1109/ICEmElec.2014.7151183
Filename :
7151183
Link To Document :
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