Title :
Vertical nanowire transistor-based CMOS: VTC analysis
Author :
Maheshwaram, Satish ; Manhas, S.K. ; Anand, B.
Author_Institution :
Dept. of Electron. & Commun. Eng., Indian Inst. of Technol. Roorkee, Roorkee, India
Abstract :
In this paper, a detailed analysis of the voltage transfer characteristics of vertical nanowire transistor-based CMOS inverter is presented. We show that noise margins are strongly dependent on the source/drain series resistance, and that the extension lengths can be used as tuning parameters to control the noise margin and gains of the inverter.
Keywords :
CMOS integrated circuits; integrated circuit noise; invertors; nanowires; VTC analysis; noise margins; source-drain series resistance; tuning parameters; vertical nanowire transistor-based CMOS inverter; voltage transfer characteristics; CMOS integrated circuits; Inverters; Logic gates; MOS devices; Noise; Performance evaluation; Resistance; Series resistance; vertical nanowire transistor; voltage transfer characteristics;
Conference_Titel :
Emerging Electronics (ICEE), 2014 IEEE 2nd International Conference on
Print_ISBN :
978-1-4673-6527-7
DOI :
10.1109/ICEmElec.2014.7151187
