Electrical model and characterization of Through Silicon Capacitors (TSC) in silicon interposer

Inspired from Through Silicon Vias (TSVs), Through Silicon Capacitors (TSCs) are newly developed capacitors integrated throughout the silicon interposer. This paper deals with a demonstrator which investigates the first process steps of TSCs. A predictive modeling method of the impedance of large matrices of such components is proposed. The modeling method makes use of 2D/3D parasitic extraction software for the modeling of each parts of the structure. The resulting lumped RLCG parameters are used to generate a global equivalent circuit composed of segments of coupled distributed cells. The modeling method is validated by experimental results on the whole frequency range of use (up to 10 GHz). Such components demonstrate simultaneously high capacitance density (up to 23 nF/mm²), low parasitic equivalent series resistance and inductance and high serial resonance frequency (in GHz range for a capacitance value of 10 nF).