Conventional magnetron sputtering of metal seed layers on high aspect ratio vias with tilting

3D ICs involve interconnected ICs as they contact each other by means of through-silicon-vias (TSVs). Although it is a cheap process and suitable to mass production, the conventional sputtering method has not been widely used to fabricate high aspect ratio vias due to its more or less rectilinear propagation property. In this study, the effect of sputtering conditions on the growth mechanism of seed layers was investigated to fabricate 10:1 or higher aspect ratio TSVs through the conventional sputtering method. In order to improve the quality of Cu seed layers, a Mo buffer layer was pre-deposited because Mo has a good conductivity and an intermediate thermal expansion coefficient between Si and Cu. To obtain a homogeneous and continuous Cu/Mo layers on TSV, the effect of sputtering conditions and substrate tilting was examined. Cu/Mo seed layers with low electrical resistivity of 2.07 microohm centimeters were obtained when the sputtering target power was maintained 5 kW, 0.67 Pa, and with 500W bias. The film stress was tensile in the sputter pressure of 0.67 Pa but close to compressive in the 0.13 Pa conditions.