DocumentCode
3597006
Title
Minimizing power dissipation during write operation to register files
Author
Patel, K. ; Wonbok Lee ; Pedram, Massoud
Author_Institution
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear
2007
Firstpage
183
Lastpage
188
Abstract
This paper presents a power reduction mechanism for the write operation in register files (RegFiles), which adds a conditional charge-sharing structure to the pair of complementary bit-lines in each column of the RegFile. Because the read and write ports for the RegFile are separately implemented, it is possible to avoid pre-charging the bit-line pair for consecutive writes. More precisely, when writing same values to some cells in the same column of the RegFile, it is possible to eliminate energy consumption due to precharging of the bit-line pair. At the same time, when writing opposite values to some cells in the same column of the RegFile, it is possible to reduce energy consumed in charging the bit-line pair thanks to charge-sharing. Motivated by these observations, we modify the bit-line structure of the write ports in the RegFile such that i) we remove per-cycle bitline pre-charging and ii) we employ conditional data dependent charge-sharing. Experimental results on a set of SPEC2000INT / MediaBench benchmarks show an average of 61.5% energy savings with 5.1% area overhead and 16.2% increase in write access delay.
Keywords
logic design; power aware computing; RegFiles; complementary bit lines; conditional charge sharing structure; power dissipation minimization; power reduction mechanism; register files; write operation; Delay; Energy consumption; Energy management; Hardware; Microprocessors; Permission; Power dissipation; Random access memory; Registers; Writing; power; register file; write operation;
fLanguage
English
Publisher
ieee
Conference_Titel
Low Power Electronics and Design (ISLPED), 2007 ACM/IEEE International Symposium on
Electronic_ISBN
978-1-59593-709-4
Type
conf
DOI
10.1145/1283780.1283820
Filename
5514315
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