Title :
High linear low noise amplifier based on self-biasing multiple gated transistors
Author :
Abbasi, A. ; Sulaiman, N. ; Teymourzadeh, Rozita
Author_Institution :
Univ. Putra Malaysia, Malaysia
Abstract :
Noise level frequently set the basic limit on the smallest signal. New noise reduction technology and amplifiers voltage-noise density, yet still offer high speed, high accuracy and low power solution. Low noise amplifiers always play a significant role in RF technology. Hence in this paper, high linear low noise amplifier (LNA) using cascode self-biased multiple gated transistors (MGTR) is presented. The proposed system is covering 0.9 to 2.4 GHz applications. To verify the functionality of the proposed LNA as a bottleneck of RF technology, a cascode LNA without MGTR is implemented and synthesized. The comparison has been done with the single-gate LNA. From the synthesize result, proposed LNA obtained 10 dBm third-order input intercept point (IIP3) in compare with single-gate LNA at 9 dB gain. The proposed LNA is implemented in 90 nm CMOS technology and reported 13 dBm IIP3, 1.9 dB NF and 9 dB gain, while consuming 7.9 mW from 2 V supply.
Keywords :
CMOS integrated circuits; MOSFET; integrated circuit noise; low noise amplifiers; radiofrequency amplifiers; CMOS technology; IIP3; MOSFET; RF technology; cascode MGTR; complementary metal oxide semiconductor; frequency 0.9 GHz to 2.4 GHz; gain 9 dB; high linear low noise amplifier; input intercept point; metal oxide semiconductor field effect transistor; noise level; noise reduction technology; power 7.9 mW; radiofrequency technology; self-biasing multiple gated transistor; single-gate LNA; voltage-noise density; CMOS integrated circuits; CMOS technology; Logic gates; MOSFET; Noise; Noise measurement; LNA; linearity; low noise amplifier; multiple gate transistors linearization; self-biasing;
Conference_Titel :
Electrical, Electronics and System Engineering (ICEESE), 2014 International Conference on
DOI :
10.1109/ICEESE.2014.7154594