Design and Implementation of Communicating Fixed and Variable Instruction Set Processors

Author

Sklyarov, Valery ; Skliarova, Iouliia ; Lima, Jo?£o F.

Author_Institution

DETIUA/IEETA, Univ. of Aveiro, Aveiro, Portugal

Volume

1

fYear

2009

Firstpage

163

Lastpage

167

Abstract

The paper describes a computational system that is composed of a special-purpose processor augmented by an application-targeted coprocessor with variable instruction set. The primary objective is to form the processor architecture in such a way that is the most appropriate to a selected scope of applications and to optimize instructions of the coprocessor for a particular application. As an example the scope of combinatorial search algorithms was examined and experiments were carried out and analyzed with the relevant system implemented in FPGAs.

Keywords

coprocessors; field programmable gate arrays; instruction sets; search problems; FPGA; application-targeted coprocessor; combinatorial search algorithms; fixed instruction set processors; processor architecture; variable instruction set processors; Algorithm design and analysis; Application specific processors; Computer aided instruction; Computer architecture; Coprocessors; Cost function; Distributed computing; Fabrics; Field programmable gate arrays; Search problems; FPGA; combinatorial search algorithms; computational system;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer and Electrical Engineering, 2009. ICCEE '09. Second International Conference on

Print_ISBN

978-1-4244-5365-8

Electronic_ISBN

978-0-7695-3925-6

Type

conf

DOI

10.1109/ICCEE.2009.238

Filename

5380645