DocumentCode
3598751
Title
Implementation of soft-decision forward error correction for 100G digital coherent system
Author
Onohara, Kiyoshi ; Miyata, Yoshikuni ; Sugihara, Kenya ; Sugihara, Takashi ; Kubo, Kazuo ; Yoshida, Hideo ; Koguchi, Kazuumi ; Mizuochi, Takashi
Author_Institution
Inf. Technol. R&D Center, Mitsubishi Electr. Corp., Kamakura, Japan
fYear
2011
Firstpage
423
Lastpage
424
Abstract
We discuss implementation and performance evaluation of LDPC(4608,4080) for 100Gb/s throughput by hardware emulator. We expect that an NCG of the LDPC code concatenated with enhanced FEC is 10.8 dB at a BER of 10-15.
Keywords
error correction codes; error statistics; forward error correction; optical communication; parity check codes; performance evaluation; BER; LDPC code; NCG; bit rate 100 Gbit/s; digital coherent system; gain 10.8 dB; hardware emulator; net coding gain; performance evaluation; soft-decision FEC; soft-decision forward error correction; Bit error rate; Field programmable gate arrays; Iron; Optimized production technology; Payloads; Receivers;
fLanguage
English
Publisher
ieee
Conference_Titel
Opto-Electronics and Communications Conference (OECC), 2011 16th
Print_ISBN
978-1-61284-288-2
Electronic_ISBN
978-986-02-8974-9
Type
conf
Filename
6015196
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