Title :
Implementation of floating point fast discrete cosine transform
Author :
Rizkalla, Maher E. ; Ei-Sharkawy, M. ; Salama, Paul ; Dukel, Bulent
Author_Institution :
Dept. of Electr. & Comput. Eng., Indiana Univ. & Purdue Univ., Indianapolis, IN, USA
Abstract :
A 32 bit floating-point one-dimensional discrete cosine transform unit was designed based on the Vetterli and Ligtenberg fast DCT flow-graph using Mentor Graphics´ and Synopsys´ tools. The floating-point algorithm and the VHDL code of the DCT unit is described, and the simulation results of the output are presented.
Keywords :
circuit simulation; discrete cosine transforms; floating point arithmetic; flow graphs; hardware description languages; integrated circuit design; logic design; logic simulation; 1D discrete cosine transform unit; 32 bit; VHDL code; Vetterli Ligtenberg fast DCT flow-graph; floating point fast DCT; floating-point algorithm; Arithmetic; Computer graphics; Discrete cosine transforms; Discrete transforms; Equations; Fast Fourier transforms; Frequency conversion; Hardware; Karhunen-Loeve transforms; Quantization;
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
DOI :
10.1109/MWSCAS.2002.1186786
