A task allocation by priority strategy for RISC architecture supported with non-overlapped multiple register set: a complexity study

The overhead processing associated with the state-swapping operation for RISC (reduced instruction set computer)-based processors is found to be significant for some real-time multitasking applications. This large overhead processing can be reduced by supporting the RISC-based processor with a nonoverlapped multiple register set (NMRS) organization. Due to the fact that the number of tasks could be larger than the number of register sets in the NMRS-based processor, the allocation of tasks states to the NMRS based on a suitable strategy is essential. In the present work, the task states allocation to the NMR is investigated using a strategy based on the task priorities. The complexities of implementing such a strategy are evaluated for both dynamic and static systems. The advantages of such a strategy are highlighted