DocumentCode :
3599106
Title :
A dual-core 64b UltraSPARC microprocessor for dense server applications
Author :
Takayanagi, T. ; Shin, J.L. ; Petrick, B. ; Su, J. ; Leon, A.S.
Author_Institution :
Sun Microsystems, Inc., U.S.A.
fYear :
2004
Firstpage :
673
Lastpage :
677
Abstract :
A processor core, previously implemented in a 0.25 μm AI process, is redesigned for a 0.13 μ m Cu process to create a dualcore processor with 1MB integrated L2 cache, offering an efficient performance/power ratio for compute-dense server applications. Deep submicron circuit design challenges, including negative bias temperature instability (NBTI), leakage and coupling noise, and L2 cache implementation are discussed.
Keywords :
Circuit synthesis; Clocks; Computer applications; Computer architecture; Computer networks; Integrated circuit reliability; Microprocessors; Sun; Throughput; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2004. Proceedings. 41st
ISSN :
0738-100X
Print_ISBN :
1-51183-828-8
Type :
conf
Filename :
1322568
Link To Document :
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