Design and FPGA implementation of biorthogonal discrete wavelet transforms

FPGA technology offers an attractive combination of low cost and high performance combined with an apparent flexibility. Although the programming model, which FPGA typically present to signal/image processing application developers, is prohibitively low-level, they remain very good target devices for rapid prototyping. The purpose of this paper is to present a methodology for rapid prototyping of biorthogonal wavelet transforms on FPGA. The methodology is based on an adequate partitioning of a bit-serial, time-interleaved "wait cycles" free architecture. The efficiency of the approach has been verified on the Xilinx 4000 FPGA series.