DocumentCode :
3599626
Title :
Design of Fault Tolerant Universal Logic in QCA
Author :
Sen, Bibhash ; Mukherjee, Rijoy ; Nath, Rajdeep Kumar ; Sikdar, Biplab K.
Author_Institution :
Dept. of Comput. Sci. & Eng., NIT, Durgapur, India
fYear :
2014
Firstpage :
166
Lastpage :
170
Abstract :
This work targets design of a robust universal logic gate in Quantum-dot cellular automata (RUQCA) that realizes majority and minority functions simultaneously with high fault tolerance. An alternative tile structure of QCA with hybrid cell orientations is formulated to maximize its throughput. The characterization of defective behaviour of RUQCA gate under cell deposition, cell misplacement and cell misalignment defects is investigated. The results show that the proposed RUQCA gate has very high fault coverage of 95%. The synthesis of fault tolerant multiplexer using RUQCA, with 90% fault tolerance, establishes the effectiveness of RUQCA.
Keywords :
cellular automata; fault tolerance; logic design; logic gates; multiplexing equipment; semiconductor quantum dots; RUQCA gate; cell deposition; cell misalignment defect; cell misplacement; fault coverage; fault tolerant multiplexer; fault tolerant universal logic design; hybrid cell orientation; robust universal logic gate in quantum dot cellular automata; Circuit faults; Clocks; Fault tolerance; Fault tolerant systems; Logic gates; Multiplexing; Wires; Coupled majority minority (CMVMIN) gate; Fault tolerant logic; QCA; QCA defects and Universal logic gate;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System Design (ISED), 2014 Fifth International Symposium on
Print_ISBN :
978-1-4799-6964-7
Type :
conf
DOI :
10.1109/ISED.2014.41
Filename :
7172768
Link To Document :
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