• DocumentCode
    3599629
  • Title

    Synthesis of Symmetric Boolean Functions Using a Three-Stage Network

  • Author

    Deb, Arighna ; Das, Debesh K. ; Bhattacharya, Bhargab B.

  • Author_Institution
    Comput. Sci. & Eng., Jadavpur Univ., Kolkata, India
  • fYear
    2014
  • Firstpage
    182
  • Lastpage
    186
  • Abstract
    This paper introduces a new three-stage circuit structure for synthesizing symmetric Boolean functions. The first stage of the proposed method improves upon an earlier approach to the synthesis of a special class of symmetric functions, known as matriochka symmetric functions. The second stage realizes the elementary symmetric functions from the matriochka symmetric functions of the first stage. Finally, in the third stage of the design, these elementary symmetric functions are used to synthesize any arbitrary symmetric function. Experiments on several benchmark functions show a reduction in circuit area compared to earlier results.
  • Keywords
    Boolean functions; network synthesis; elementary symmetric function; matriochka symmetric function; symmetric Boolean function; three-stage circuit structure; three-stage network; three-stage synthesis; Benchmark testing; Binary codes; Boolean functions; Cryptography; Logic gates; Symmetric matrices; Tin; Elementary Symmetric Function; Half adder; Matriochka Symmetric function;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic System Design (ISED), 2014 Fifth International Symposium on
  • Print_ISBN
    978-1-4799-6964-7
  • Type

    conf

  • DOI
    10.1109/ISED.2014.44
  • Filename
    7172771