Title :
Analysis of technological concerns on electrical characteristics of SOI power LUDMOS transistors
Author :
Toulon, G. ; Cort?©s, I. ; Morancho, F. ; Hugonnard-Bruyere, E. ; Villard, B. ; Toren, W.J.
Author_Institution :
LAAS, CNRS, Toulouse, France
Abstract :
This paper is focused on the optimization design of 150 V power LDMOS transistors with the purpose of being integrated in a new generation of Smart-Power technology based upon a 0.18μm SOI-CMOS technology. Different structure parameters, such as the STI length, the N-well doping profile and the relative position of the N-well mask to the STI are analyzed in terms of voltage capability, specific on-state resistance and safe operating area.
Keywords :
power MOSFET; semiconductor device models; silicon-on-insulator; N-well mask; SOI power LUDMOS transistors; SOI-CMOS technology; STI; Smart-Power technology; power LDMOS transistors; silicon-on-insulator; size 0.18 mum; voltage 150 V; Breakdown voltage; CMOS technology; Design optimization; Doping profiles; Electric variables; Oxidation; Paper technology; Semiconductor optical amplifiers; Solid modeling; Switches;
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2010 22nd International Symposium on
Print_ISBN :
978-1-4244-7718-0
Electronic_ISBN :
1943-653X
