Title :
The fast tracker processor for hadronic collider triggers
Author :
Annovi, A. ; Bagliesi, M.G. ; Bardi, A. ; Carosi, R. ; Orso, M. Dell ; Onofrio, M.D. ; Giannetti, P. ; Iannaccone, G. ; Morsani, F. ; Pietri, M. ; Varotto, G.
Author_Institution :
INFN, Pisa, Italy
fDate :
6/22/1905 12:00:00 AM
Abstract :
Perspective for precise and fast track reconstruction in future hadronic collider experiments are addressed. We discuss the feasibility of a pipelined highly parallelized processor dedicated to the implementation of a very fast algorithm. The algorithm is based on the use of a large bank of pre-stored combinations of trajectory points (patterns) for extremely complex tracking systems. The CMS experiment at LHC is used as a benchmark. Tracking data from the events selected by the level-1 trigger are sorted and filtered by the Fast Tracker processor at a rate of 100 kHz. This data organization allows the level-2 trigger logic to reconstruct full resolution tracks with transverse momentum above few GeV and search secondary vertexes within typical level-2 times
Keywords :
colliding beam accelerators; data acquisition; high energy physics instrumentation computing; nuclear electronics; parallel processing; trigger circuits; 100 kHz; CMS experiment; complex tracking systems; data organization; data tracking; fast algorithm; fast track reconstruction; fast tracker processor; full resolution tracks; hadronic collider triggers; level-1 trigger; level-2 trigger logic; pipelined highly parallelized processor; secondary vertexes; trajectory points; transverse momentum; Associative memory; Collision mitigation; Delay; Detectors; Hardware; Logic; Pattern recognition; Pipeline processing; Roads; Silicon;
Conference_Titel :
Nuclear Science Symposium Conference Record, 2000 IEEE
Print_ISBN :
0-7803-6503-8
DOI :
10.1109/NSSMIC.2000.949955
