• DocumentCode
    3600978
  • Title

    Automated Technology Migration Methodology for Mixed-Signal Circuit Based on Multistart Optimization Framework

  • Author

    Liuxi Qian ; Zhaori Bi ; Dian Zhou ; Xuan Zeng

  • Author_Institution
    Dept. of Electr. Eng., Univ. of Texas at Dallas, Richardson, TX, USA
  • Volume
    23
  • Issue
    11
  • fYear
    2015
  • Firstpage
    2595
  • Lastpage
    2605
  • Abstract
    Optimization-simulation loop-based method is popular and efficient in design migration/reuse automation. However, it is only restricted to be used in block-level due to the complexity of current mixed-signal system. This paper presents a hierarchical methodology for efficiently migrating mixed-signal circuit design from one technology node to another, while keeping the same circuit and layout topologies. It utilizes two stages of optimization processes to automatically resize and refine device dimensions in target technology. In the first stage, to avoid the costly simulation time without scarifying systematical functionality, only one block is represented in transistor level (TL), while other blocks are replaced with behavioral models. The multistart global optimization technique is applied to resize the TL block in systematic connection. This stage provides a good initial point for next system-level refinement. Moreover, for obtaining a process and parasitic closure solution, both parasitic and process variation effects are explored and used to constrain the schematic migration. A representative mixed-signal system, charge-pump phase-locked loop, is used to validate the proposed methodology. The experimental results show that the proposed methodology efficiently generates quality designs in target technology with much less simulation iterations, when comparing with recent available approaches.
  • Keywords
    charge pump circuits; mixed analogue-digital integrated circuits; optimisation; phase locked loops; TL block; automated technology migration methodology; behavioral model; charge-pump phase-locked loop; current mixed-signal system; device dimension; migration automation; mixed-signal circuit; multistart global optimization technique; multistart optimization framework; optimization-simulation loop-based method; parasitic closure solution; process variation effect; reuse automation; schematic migration; system-level refinement; transistor level; Equations; Hardware design languages; Integrated circuit modeling; Mathematical model; Optimization; Phase frequency detector; Voltage-controlled oscillators; Design reuse; optimization method; phase-locked loop (PLL); technology migration; technology migration.;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2014.2377013
  • Filename
    6985655