DocumentCode
3601008
Title
Implementation of the DWT in a GPU through a Register-based Strategy
Author
Enfedaque, Pablo ; Auli-Llinas, Francesc ; Moure, Juan C.
Author_Institution
Dept. of Inf. & Commun. Eng., Univ. Autonoma de Barcelona, Barcelona, Spain
Volume
26
Issue
12
fYear
2015
Firstpage
3394
Lastpage
3406
Abstract
The release of the CUDA Kepler architecture in March 2012 has provided Nvidia GPUs with a larger register memory space and instructions for the communication of registers among threads. This facilitates a new programming strategy that utilizes registers for data sharing and reusing in detriment of the shared memory. Such a programming strategy can significantly improve the performance of applications that reuse data heavily. This paper presents a register-based implementation of the Discrete Wavelet Transform (DWT), the prevailing data decorrelation technique in the field of image coding. Experimental results indicate that the proposed method is, at least, four times faster than the best GPU implementation of the DWT found in the literature. Furthermore, theoretical analysis coincide with experimental tests in proving that the execution times achieved by the proposed implementation are close to the GPU´s performance limits.
Keywords
discrete wavelet transforms; graphics processing units; image coding; parallel architectures; CUDA Kepler architecture; DWT; Nvidia GPU; data reusing; data sharing; discrete wavelet transform; image coding; register-based strategy; Computer architecture; Discrete wavelet transforms; Graphics processing units; Image coding; Instruction sets; Compute Unified Device Architecture (CUDA); DWT; Discrete Wavelet Transform (DWT); Graphics Processing Unit (GPU);
fLanguage
English
Journal_Title
Parallel and Distributed Systems, IEEE Transactions on
Publisher
ieee
ISSN
1045-9219
Type
jour
DOI
10.1109/TPDS.2014.2384047
Filename
6991550
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