DocumentCode :
3601216
Title :
Morphable hundred-core heterogeneous architecture for energy-aware computation
Author :
Neves, Nuno ; Mendes, Henrique ; Chaves, Ricardo Jorge ; Toma?Œ??s, Pedro ; Roma, Nuno
Author_Institution :
Inst. Super. Tecnico, Univ. de Lisboa, Lisbon, Portugal
Volume :
9
Issue :
1
fYear :
2015
Firstpage :
49
Lastpage :
62
Abstract :
Given the increased demand for high performance and energy-aware computational platforms, an adaptive heterogeneous computing platform composed of 100+ cores is herein proposed. The platform is based on an aggregate of multiple processing clusters, each containing multiple processing cores, whose architectures are adapted, in execution time, to the instantaneous energy and performance constraints of the software application under execution. This adaptation is ensured by a sophisticated hypervisor engine, implemented as a software layer in the host computer, which keeps a permanent record of a broad set of performance counters, gathered from the execution of each core in the field-programmable gate array (FPGA), in order to dynamically determine the optimal heterogeneous mix of processor architectures that satisfy the considered constraints. By issuing convenient reconfiguration commands to the reconfiguration engine, implemented in a static portion of the FPGA, partial dynamical reconfiguration mechanisms ensure a runtime adaptation of the cores that integrate each cluster. When compared with static instantiations of the considered many-core processor architectures, the obtained experimental results show that significant gains can be obtained with the proposed adaptive computing platform, with performance speedups up to 9.5× , while offering reductions in terms of the consumed energy as high as 10×.
Keywords :
field programmable gate arrays; multiprocessing systems; power aware computing; reconfigurable architectures; FPGA; adaptive heterogeneous computing platform; energy consumption reduction; execution time; fleld-programmable gate array; high-performance energy-aware computational platforms; host computer; hypervisor engine; instantaneous energy constraints; instantaneous performance constraints; many-core processor architectures; morphable hundred-core heterogeneous architecture; multiple processing clusters; multiple processing cores; optimal heterogeneous mix; partial-dynamical reconfiguration mechanisms; performance counters; permanent record; reconflguration commands; reconflguration engine; runtime adaptation; software application; software layer; static portion;
fLanguage :
English
Journal_Title :
Computers Digital Techniques, IET
Publisher :
iet
ISSN :
1751-8601
Type :
jour
DOI :
10.1049/iet-cdt.2014.0078
Filename :
7018700
Link To Document :
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