• DocumentCode
    3601290
  • Title

    On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse

  • Author

    Gopalakrishnan, Roshan ; Basu, Arindam

  • Author_Institution
    IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
  • Volume
    26
  • Issue
    10
  • fYear
    2015
  • Firstpage
    2596
  • Lastpage
    2601
  • Abstract
    This brief describes the neuromorphic very large scale integration implementation of a synapse utilizing a single floating-gate (FG) transistor that can be used to store a weight in a nonvolatile manner and demonstrate biological learning rules such as spike-timing-dependent plasticity (STDP). The experimental STDP plot (change in weight against △t = tpost - tpre) of a traditional FG synapse from previous studies shows a depression instead of potentiation at some range of positive values of △t-we call this non-STDP behavior. In this brief, we first analyze theoretically the reason for this anomaly and then present a simple solution based on changing control gate waveforms of the FG device to make the weight change conform closely to biological observations over a wide range of parameters. The experimental results from an FG synapse fabricated in AMS 0.35-μm CMOS process design are also presented to justify the claim. Finally, we present the simulation results of a circuit designed to create the modified gate voltage waveform.
  • Keywords
    CMOS integrated circuits; VLSI; transistor circuits; AMS CMOS process; biological learning rules; biological observations; changing control gate waveforms; floating gate synapse; modified gate voltage waveform; neuromorphic very large scale integration; nonSTDP behavior; single floating-gate transistor; size 0.35 mum; spike-timing-dependent plasticity; Equations; Logic gates; Mathematical model; Simulation; Transistors; Tunneling; Very large scale integration; Floating gate (FG); learning; neuromorphic; neuroscience; spike-timing-dependent plasticity (STDP); synapse; very large scale integration (VLSI); very large scale integration (VLSI).;
  • fLanguage
    English
  • Journal_Title
    Neural Networks and Learning Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2162-237X
  • Type

    jour

  • DOI
    10.1109/TNNLS.2015.2388633
  • Filename
    7031963