DocumentCode :
3602069
Title :
Figures-of-Merit to Evaluate the Significance of Switching Noise in Analog Circuits
Author :
Zhihua Gan ; Salman, Emre ; Stanacevic, Milutin
Author_Institution :
Dept. of Electr. & Comput. Eng., Stony Brook Univ., Stony Brook, NY, USA
Volume :
23
Issue :
12
fYear :
2015
Firstpage :
2945
Lastpage :
2956
Abstract :
An analysis flow is proposed to determine the significance of induced (switching) noise in analog circuits. The proposed flow is exemplified through two commonly used amplifier topologies. Specifically, input-referred switching noise is introduced as the first figure-of-merit and compared with the well-known equivalent input device noise through analytic expressions. The comparison is achieved as a function of multiple parameters that characterize switching noise in the time domain (modeled as a decaying sine wave), such as peak amplitude, period, oscillation frequency within each period, and damping coefficient. The analytic expressions used to obtain input-referred switching and device noise are verified with SPICE simulations. These expressions are utilized to develop dominance regions for both noise sources. Furthermore, time-domain switching noise amplitude (at the bulk node) at which the input device and switching noise magnitude are equal (in the frequency domain) is determined as the second figure-of-merit, providing guidelines for the signal isolation process. Reverse body biasing is also proposed to alleviate the effect of switching noise by weakening the bulk-to-input transfer function as opposed to reducing the switching noise amplitude at the bulk nodes. It is demonstrated that this method has a negligible effect on primary design objectives of the victim circuit while reducing the input-referred switching noise by up to 10 dB. As a case study, the proposed flow is applied to a potentiostat circuitry where input sensitivity is of primary importance.
Keywords :
amplifiers; circuit switching; damping; frequency-domain analysis; integrated circuit design; integrated circuit modelling; integrated circuit noise; network topology; time-domain analysis; SPICE simulations; amplifier topologies; analog circuits; bulk-to-input transfer function; damping coefficient; equivalent input device noise; figures-of-merit; frequency domain; input-referred switching noise; noise sources; oscillation frequency; potentiostat circuitry; reverse body biasing; signal isolation process; switching noise magnitude; time-domain switching noise amplitude; Frequency-domain analysis; Noise; Switches; Switching circuits; Time-domain analysis; Transfer functions; Transistors; Analog-digital integrated circuits; circuit noise; integrated circuit modeling; integrated circuit modeling.;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2386315
Filename :
7097083
Link To Document :
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