DocumentCode :
3602104
Title :
Belling the CAD: Toward Security-Centric Electronic System Design
Author :
Rajendran, Jeyavijayan ; Ali, Aman ; Sinanoglu, Ozgur ; Karri, Ramesh
Author_Institution :
New York Univ. Polytech. Sch. of Eng., New York, NY, USA
Volume :
34
Issue :
11
fYear :
2015
Firstpage :
1756
Lastpage :
1769
Abstract :
In order to keep pace with the growing complexity of integrated circuits (ICs), IC and system designers are increasingly using electronic system level (ESL) design tools. ESL tool sales were around $460 million in 2011. The value of the ICs designed using these tools is at least an order of magnitude more. Concurrently, advanced IC reverse engineering techniques are being developed and used by attackers. In response, several anti-reverse engineering techniques have been proposed for integration into the IC design flow. An important class of defenses hardens the controllers that orchestrate the functionality of designs generated by ESL tools. We demonstrate an attack to recover the controller in any ESL-generated design even if the controller has been hardened using state-of-the-art controller hardening techniques. The attack analyzes the unhardened parts of the controller (i.e., the controller output logic and datapath) and reconciles this information with the architectural, controller, and timing constraints implicit in and underlying all ESL design methodologies. We then propose a countermeasure that inserts decoy connections into an ESL tool-generated design to thwart reverse engineering. We introduce a security metric to quantify the effectiveness of the developed attacks and defenses. We demonstrate the attack and defenses on designs generated by state-of-the-art ESL tools.
Keywords :
circuit CAD; high level synthesis; integrated circuit design; reverse engineering; CAD; IC design flow; advanced IC reverse engineering techniques; developed attacks and defenses; electronic system level design tools; security metric; security-centric electronic system design; Clocks; Foundries; Integrated circuits; Logic gates; Registers; Reverse engineering; Security; Hardware security; High-level synthesis; Intellectual Property Protection; Piracy; high-level synthesis; intellectual property protection; piracy;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2015.2428707
Filename :
7100906
Link To Document :
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