• DocumentCode
    3602577
  • Title

    STT-SNN: A Spin-Transfer-Torque Based Soft-Limiting Non-Linear Neuron for Low-Power Artificial Neural Networks

  • Author

    Deliang Fan ; Yong Shim ; Raghunathan, Anand ; Roy, Kaushik

  • Author_Institution
    Purdue Univ., West Lafayette, IN, USA
  • Volume
    14
  • Issue
    6
  • fYear
    2015
  • Firstpage
    1013
  • Lastpage
    1023
  • Abstract
    Recent years have witnessed growing interest in the use of artificial neural networks (ANNs) for vision, classification, and inference problems. An artificial neuron sums N weighted inputs and passes the result through a non-linear transfer function. Large-scale ANNs impose very high computing requirements for training and classification, leading to great interest in the use of post-CMOS devices to realize them in an energy efficient manner. In this paper, we propose a spin-transfer-torque (STT) device based on domain wall motion (DWM) magnetic strip that can efficiently implement a soft-limiting non-linear neuron (SNN) operating at ultra-low supply voltage and current. In contrast to previous spin-based neurons that can only realize hard-limiting transfer functions, the proposed STT-SNN displays a continuous resistance change with varying input current, and can therefore be employed to implement a soft-limiting neuron transfer function. Soft-limiting neurons are greatly preferred to hard-limiting ones due to their much improved modeling capacity, which leads to higher network accuracy and lower network complexity. We also present an ANN hardware design employing the proposed STT-SNNs and memristor crossbar arrays (MCA) as synapses. The ultra-low voltage operation of the magneto metallic STT-SNN enables the programmable MCA-synapses, computing analog-domain weighted summation of input voltages, to also operate at ultra-low voltage. We modeled the STT-SNN using micro-magnetic simulation and evaluated them using an ANN for character recognition. Comparisons with analog and digital CMOS neurons show that STT-SNNs can achieve around two orders of magnitude lower energy consumption.
  • Keywords
    low-power electronics; memristors; micromagnetics; neural chips; ANN hardware design; DWM magnetic strip; Large-scale ANNs; MCA; SNN operation; STT device; STT-SNN; analog CMOS neurons; analog-domain weighted summation; artificial neuron; character recognition; continuous resistance change; digital CMOS neurons; domain wall motion; energy consumption; hard-limiting neurons; input voltages; low-power artificial neural networks; magneto metallic STT-SNN; memristor crossbar arrays; micromagnetic simulation; modeling capacity improvement; network accuracy; network complexity; nonlinear transfer function; programmable MCA-synapses; soft-limiting neuron transfer function; soft-limiting nonlinear neuron operation; spin-transfer-torque based soft-limiting nonlinear neuron; synapses; ultralow supply current; ultralow supply voltage; ultralow voltage operation; varying input current; weighted in- puts; Artificial neural networks; Magnetic domain walls; Magnetic domains; Magnetic tunneling; Neurons; Resistance; Transfer functions; Artificial neural network; Domain wall motion; Memristor crossbar array; domain wall motion; memristor crossbar array; soft-limiting neuron;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2015.2437902
  • Filename
    7113894