Title :
Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations
Author :
Jyun-Hao Chang ; Hsin-I Wu ; Hsien-Lun Pai ; Ren-Song Tsay ; Wai-Kei Mak
Author_Institution :
Taiwan Semicond. Manuf. Co., Hsinchu, Taiwan
Abstract :
Multicore instruction-set simulation (MCISS) has become more and more important due to tremendous increase in number of multicore designs. To boost the speed of MCISS, one of the most effective and commonly used approaches is parallel simulation. However, timing synchronization must be applied to ensure accurate simulation results of parallel MCISS, and may induce huge synchronization overhead. In this paper, we propose a highly efficient and effective parallel MCISS approach by synchronizing timing before each synchronization function (SF) call. We improve the applicability of the state-of-the-art critical-section-level simulation approach with a generic blocking/nonblocking send/receive model covering all types of SFs. To further reduce synchronization overhead, we also introduce optimization methods such as a hybrid scheduling technique and provide an analysis algorithm that helps the designers to choose the host platform with the best simulation performance. Experiments show that the proposed approach attains a simulation speed of up to 285 MIPS, while producing accurate timing and functional results.
Keywords :
instruction sets; multiprocessing systems; parallel processing; processor scheduling; synchronisation; SF; critical-section-level simulation approach; generic blocking-nonblocking send-receive model; host platform; hybrid scheduling technique; multicore designs; optimization methods; parallel MCISS approach; synchronization overhead reduction; synchronization-function-level parallel multicore instruction-set simulations; timing synchronization function; Computational modeling; Delays; Hardware; Integrated circuit modeling; Simulation; Synchronization; Deterministic; Parallel multi-core instruction-set simulations; Timing Synchronization; parallel multicore instruction-set simulations (MCISSs); timing synchronization;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2015.2434954