Digital Offset Cancellation for Long Time-Constant Subthreshold OTA-C Integrators

Systems using integrators with very long time constants can place a severe constraint on allowable amplifier offset. Postfabrication cancellation of these offsets is a requirement in these applications. This brief describes the design, simulation, and measurement of a subthreshold operational transconductance amplifier (OTA) with digital calibration and its robust calibration algorithm. Statistical simulations show the scheme´s ability to reduce the output offset by a factor of 40. Measurements on many prototype OTAs validate the technique´s ability to bring the standard deviation of integrated output offset to less than 10 mV in most cases, or about 30μ V input-referred offsets. A secant-based algorithm is proposed that finds the optimum digital calibration code for each OTA in a small number of search steps that minimizes the integrated output offset. This algorithm is robust to nonmonotonic tuning characteristics, allowing the additional circuitry to be minimally sized. For low-frequency applications below 5 Hz, the scheme has nearly no net impact on die area in processes allowing circuitry below the integration capacitor.