Title :
Digital Implementation of a Single Dynamical Node Reservoir Computer
Author :
Alomar, Miquel L. ; Soriano, Miguel C. ; Escalona-Mora?Œ??n, Miguel ; Canals, Vincent ; Fischer, Ingo ; Mirasso, Claudio R. ; Rossello?Œ??, Jose L.
Author_Institution :
Phys. Dept., Univ. de les Illes Balears, Palma de Mallorca, Spain
Abstract :
Minimal hardware implementations of machine-learning techniques have been attracting increasing interest over the last decades. In particular, field-programmable gate array (FPGA) implementations of neural networks (NNs) are among the most appealing ones, given the match between system requirements and FPGA properties, namely, parallelism and adaptation. Here, we present an FPGA implementation of a conceptually simplified version of a recurrent NN based on a single dynamical node subject to delayed feedback. We show that this configuration is capable of successfully performing simple real-time temporal pattern classification and chaotic time-series prediction.
Keywords :
chaos; delays; feedback; field programmable gate arrays; learning (artificial intelligence); pattern classification; recurrent neural nets; time series; FPGA; chaotic time-series prediction; digital implementation; feedback delay; field-programmable gate array; machine-learning technique; pattern classification; recurrent NN; recurrent neural network; single dynamical node reservoir computing; Computers; Delays; Field programmable gate arrays; Hardware; Random access memory; Reservoirs; Training; Artificial Neural Networks (ANN); Artificial neural networks (ANNs); field-programmable gate arrays (FPGA); field-programmable gate arrays (FPGAs); hardware (HW); multiple signal classification; neural network (NN); pattern recognition; recurrent neural networks (RNN); time series prediction; time-series prediction;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2015.2458071
