Impact of Crystallization Method on Poly-Si Tunnel FETs

In this letter, the impact of crystallization method on the electrical characteristics of polycrystalline silicon (poly-Si) tunnel field-effect transistors (TFETs) is investigated. Different crystallization methods may result in different amounts of interface traps (Nit) and bulk traps (N_GB). TFETs crystallized with solid-phase crystallization (SPC) and metal-induced lateral crystallization (MILC) were fabricated and compared. In comparison with the SPC TFETs, the MILC TFETs exhibit ~4.5× higher ON-state current ION, subthreshold swing reduction ΔS.S. ~202 mV/decade, and larger ~7.2× ON/OFF current ratio. According to the measurement of a monitor poly-Si thin-film transistor, replacing SPC with MILC results in a reduced N_it ~ 0.60× and a reduced N_GB ~ 0.36×, respectively. It can enhance the gate-to-tunnel junction controllability. Consequently, lowering trap density favors reducing power consumption of TFETs and provides a promising solution for future low-power driving circuits in portable electronics.