A 240 GHz Fully Integrated Wideband QPSK Transmitter in 65 nm CMOS

Author

Shinwon Kang ; Thyagarajan, Siva V. ; Niknejad, Ali M.

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Univ. of California at Berkeley, Berkeley, CA, USA

Volume

50

Issue

10

fYear

2015

Firstpage

2256

Lastpage

2267

Abstract

In this paper, a 240 GHz 16 Gbps QPSK transmitter is demonstrated in 65 nm bulk CMOS process. The transmitter chain employs an 80 GHz local oscillator and a modulator to generate the data that is amplified by a class-E switching power amplifier. The amplified signal then drives the 240 GHz tripler to generate the required modulated data. By using on-chip slotted loop antennas, the transmitter achieves an EIRP of 1 dBm. A maximum data rate of 16 Gbps is achieved with a transmitter efficiency of 14 pJ/bit.

Keywords

loop antennas; power amplifiers; quadrature phase shift keying; bulk CMOS process; class-E switching power amplifier; frequency 240 GHz; frequency 80 GHz; fully integrated wideband QPSK transmitter; local oscillator; on-chip slotted loop antennas; Binary phase shift keying; Frequency modulation; Phase noise; Transmitters; 240 GHz; 80 GHz LO; BPSK; PRBS generator; QPSK; architecture; class-E power amplifier; communication system; differential hybrid; energy efficiency; frequency tripler; high data rate; modulator; on-chip slotted loop antenna; sub-millimeter-wave; sub-terahertz; transmitter; wideband;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2015.2467179

Filename

7265100