• DocumentCode
    3606274
  • Title

    Efficient out-of-GPU memory strategies for solving matrix equation generated by method of moments

  • Author

    Topa, T.

  • Author_Institution
    Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland
  • Volume
    51
  • Issue
    19
  • fYear
    2015
  • Firstpage
    1542
  • Lastpage
    1544
  • Abstract
    The numerical solution of the dense linear complex valued system of equations generated by the method of moments (MoMs) generally proceeds by factoring the impedance matrix into LU decomposition. Depending on available hardware resources, the LU algorithm can be executed either on sequential or parallel computers. A straightforward parallel implementation of LU factorisation does not yield a well distributed workload, and therefore it is the computationally most expensive step of the MoMs process, especially when adapting to the GPU technology. Some performance improvement of LU decomposition can be achieved by applying a hybrid approach to the parallel processing model. In this reported work, the problem of accelerating an out-of-core-like LU solver on a heterogeneous low-cost single GPU/CPU computing platform is addressed. For this, a variable panel-width tuning scheme combined with a hybrid panel-based LU decomposition method is employed, which is something of a novelty in the development of dense linear algebra software. To demonstrate the efficiency of the proposed approach some numerical results are provided.
  • Keywords
    graphics processing units; mathematics computing; matrix decomposition; method of moments; parallel processing; DLA software; GPU technology; LU factorisation; MoM; dense linear algebra software; dense linear complex valued equation system; hardware resources; heterogeneous low-cost single GPU/CPU computing platform; hybrid approach; hybrid panel-based LU decomposition method; impedance matrix factorisation; matrix equation; method-of-moments; numerical solution; out-of-GPU memory strategies; out-of-core-like LU solver; parallel computers; parallel processing model; performance improvement; sequential computers; variable panel-width tuning scheme;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2015.2175
  • Filename
    7272247