• DocumentCode
    3606715
  • Title

    The Execution Migration Machine: Directoryless Shared-Memory Architecture

  • Author

    Keun Sup Shim ; Lis, Mieszko ; Khan, Omer ; Devadas, Srinivas

  • Volume
    48
  • Issue
    9
  • fYear
    2015
  • Firstpage
    50
  • Lastpage
    59
  • Abstract
    For certain applications involving chip multiprocessors with more than 16 cores, a directoryless architecture with fine-grained and partial-context thread migration can outperform directory-based coherence, providing lighter on-chip traffic and reduced verification complexity.
  • Keywords
    microprocessor chips; shared memory systems; chip multiprocessors; directoryless shared-memory architecture; execution migration machine; fine-grained thread migration; partial-context thread migration; verification complexity; Cache memory; Distributed databases; Instruction sets; Parallel processing; Program processors; Protocols; Software architecture; System-on-chip; data locality; distributed caches; hardware; parallel architectures; shared memory; thread migration;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/MC.2015.263
  • Filename
    7274309
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3606715