Title :
Using Two-Step Mesa to Prevent the Effects of Sidewall Defects on the GaN p-i-n Diodes
Author :
Yung-Fu Chang ; Chien-Lan Liao ; Bo-Sheng Zheng ; Jia-Zhe Liu ; Chong-Lung Ho ; Kuang-Chien Hsieh ; Meng-Chyi Wu
Author_Institution :
Inst. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Abstract :
In this paper, the two-step mesas of quasi-vertical GaN p-i-n diodes grown on pattern sapphire substrates (PSSs) with a 3-μm i-layer were defined by two-step dry etching to different depths to prevent the effects of sidewall damages. As compared with the one-step mesa device, the two-step mesa devices show lower reverse leakage currents, lower capacitances, lower specific ON-resistances, and higher reverse breakdown voltages. Furthermore, one of the two-step mesa devices with plasma treatment exhibits about two orders of magnitude of reduction in the leakage current at -100 V, a breakdown voltage of 495 V, and a specific ON-resistance (RONA) of 0.27 mΩ-cm2. Baliga´s figures of merit (VB2/RONA) of 0.908 GW/cm2, which is the highest value reported for the fabricated GaN p-i-n diodes grown on sapphire, is achieved for the GaN p-i-n diode grown on PSS with a two-step mesa and plasma treatment.
Keywords :
III-V semiconductors; capacitance; gallium compounds; leakage currents; p-i-n diodes; semiconductor device breakdown; sputter etching; wide band gap semiconductors; Al2O3; GaN; capacitances; pattern sapphire substrates; plasma treatment; quasivertical GaN p-i-n diodes; reverse breakdown voltages; reverse leakage currents; specific ON-resistances; two-step dry etching; two-step mesas; Etching; Gallium nitride; Junctions; Leakage currents; P-i-n diodes; Plasmas; Substrates; Baliga???s figures of merit; Baliga?s figures of merit; GaN; p-i-n diodes; pattern sapphire substrates; sidewall damages; two-step mesas;
Journal_Title :
Quantum Electronics, IEEE Journal of
DOI :
10.1109/JQE.2015.2479465
