Low-Input Power-Level CMOS RF Energy-Harvesting Front End

RF energy-harvesting front ends consist of LC matching networks and RF rectifiers. The minimum detectable power (sensitivity) is dependent on the losses of both parts. In this paper, RF energy-harvesting sensitivity limits at steady state and design tradeoffs for matching networks and rectifiers are introduced. These limits and tradeoffs are examined for standard CMOS 0.18-μm technology. Two designs, one with off-chip matching network and the other with on-chip matching network, are presented, compared, and measured for an output voltage of 1 V. The sensitivity of the off-chip design is -27.3 dBm while taking 180 × 90 μm² die area and off-chip high quality inductor and capacitor, which takes an extra 7.28 mm² printed circuit board area. The fully integrated on-chip design has a sensitivity of -21.7 dBm while taking 820 × 450 μm² die area. The sensitivity of the former proved superior while the latter is more attractive in terms of compactness, low cost, and easier tunability.