DocumentCode
3607595
Title
High Throughput Pipeline Decoder for LDPC Convolutional Codes on GPU
Author
Yi Hou ; Rongke Liu ; Hao Peng ; Ling Zhao
Author_Institution
Sch. of Electron. & Inf. Eng., Beihang Univ., Beijing, China
Volume
19
Issue
12
fYear
2015
Firstpage
2066
Lastpage
2069
Abstract
In this letter, we present a graphics processing unit (GPU)-based LDPC convolutional code (LDPC-CC) pipeline decoder with optimized parallelism. The proposed decoder exploits different granularities of decoding parallelism for both the compute unified device architecture (CUDA) kernel execution stage and the data transfer stage. Moreover, the parameter selection criteria for decoder implementation are designed to avoid exhaustive search of all the combinations of parameters. The experiments are carried out on Nvidia GTX460 and GTX580 platforms. The results demonstrate the proposed decoder achieves about 3 times speedup compared to the existing GPU-based work.
Keywords
convolutional codes; decoding; graphics processing units; parity check codes; CUDA kernel execution stage; GPU; LDPC-CC pipeline decoder; Nvidia GTX460; Nvidia GTX580; compute unified device architecture; data transfer stage; decoding parallelism granularity; graphics processing unit; low-density parity check convolutional code; throughput pipeline decoder; Decoding; Graphics processing units; Iterative decoding; Parallel processing; Throughput; GPU; LDPC convolutional code; parallelism; pipeline decoder;
fLanguage
English
Journal_Title
Communications Letters, IEEE
Publisher
ieee
ISSN
1089-7798
Type
jour
DOI
10.1109/LCOMM.2015.2486764
Filename
7289356
Link To Document