Title :
Investigating Effect of Postannealing Time on Positive Bias Stress Stability of In–Ga–Zn–O TFT by Conductance Method
Author :
Mai Phi Hung ; Dapeng Wang ; Furuta, Mamoru
Author_Institution :
Grad. Sch. of Eng., Kochi Univ. of Technol., Kochi, Japan
Abstract :
The conductance method was used to investigate the positive bias stress (PBS) degradation mechanism of In-Ga-Zn-O (IGZO) thin-film transistor (TFT). The effects of postannealing time on the PBS degradation mechanism were investigated. The stabilization of the donorlike interface defects was found to be the reason for the threshold voltage instability in the IGZO-TFT under the PBS test. The donorlike defects at the front channel interface and in the plasma-enhanced chemical vapor deposition (PE-CVD) SiOx acted as the electron trapping centers. The electron trapping resistance of the PE-CVD SiOx was improved by increasing the postannealing time, resulting in an improvement in the PBS stability. However, long-time postannealing-induced creation of the deep acceptorlike interface defects in the TFT under the PBS. The energy distribution of the created deep acceptorlike interface defects was revealed using the conductance measurement.
Keywords :
annealing; electron traps; gallium compounds; indium compounds; plasma CVD; silicon compounds; thin film transistors; zinc compounds; IGZO TFT; In-Ga-Zn-O; PBS degradation mechanism; PBS test; PE-CVD; SiOx; acceptorlike interface defect; conductance method; donorlike interface defect; electron trapping resistance; energy distribution; front channel interface; plasma-enhanced chemical vapor deposition; positive bias stress stability; postannealing time effect; thin-film transistor; threshold voltage instability; Degradation; Electron traps; Logic gates; Stability analysis; Stress; Thermal stability; Transistors; Acceptorlike interface defects; IGZO/SiOₓ interface; IGZO/SiOx interface; PBS; amorphous In-Ga-Zn-O (IGZO); amorphous In???Ga???Zn???O (IGZO); conductance method; donorlike interface defects; improve positive bias stress (PBS) stability; positive gate bias stress; thin-film transistor (TFT); thin-film transistor (TFT).;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2015.2478807