Investigation of Lanthanum Silicate Conditions on 4H-SiC MOSFET Characteristics

Author

Xiangyu Yang ; Bongmook Lee ; Misra, Veena

Author_Institution

Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA

Volume

62

Issue

11

fYear

2015

Firstpage

3781

Lastpage

3785

Abstract

The lanthanum silicate interface engineering has been shown to dramatically improve the mobility of 4H-silicon carbide (SiC) MOSFETs. We studied the impact of post deposition annealing (PDA) conditions and the initial lanthanum oxide (La₂O₃) thickness on the MOSFET performance. The combination of 900 °C PDA and 1 nm La₂O₃ leads to highest field-effect mobility. Higher PDA temperature leads to mobility reduction due to lower lanthanum concentration at the SiC/dielectric interface. The peak mobility and threshold voltage show strong dependence on the initial La₂O₃ thickness.

Keywords

MOSFET; annealing; carrier mobility; lanthanum compounds; silicon compounds; wide band gap semiconductors; 4H-SiC MOSFET characteristic; La₂O₃; PDA; SiC; dielectric interface; field-effect mobility; lanthanum concentration; lanthanum oxide; lanthanum silicate; post deposition annealing; temperature 900 C; threshold voltage; Dielectrics; Handheld computers; Logic gates; MOSFET; Silicon carbide; Temperature measurement; Threshold voltage; ALD SiO₂; ALD SiO2; Atomic layer deposition (ALD); lanthanum silicate (LaSiOₓ); lanthanum silicate (LaSiOx); mobility; silicon carbide (SiC); silicon carbide (SiC).;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2015.2480047

Filename

7294665