Manufacturing Yield for Multiple Lines Gold Bumping Processes With Asymmetric Tolerances

Development of touch display driver IC (TDDI) has enabled slimmer smartphone design by virtue of the integration of touch controller and display driver ICs (DDIs) into a single chip. TDDI plays an important role in touch integrated display panels. Compared to conventional DDI, TDDI requires more bonding pads for touch applications, thus increasing the usage of gold. The requirement to keep costs down forces manufacturers to look for ways to reduce the usage of gold. In order to reduce the usage of gold, gold bumping processes with asymmetric tolerances are considered, in which deviations from the target are less tolerable in lower specification limits than in upper specification limits. In addition, due to economies of scale considerations, gold bumping processes involving multiple manufacturing lines are commonly considered in Taiwan. However, no yield index has been developed for multiple-line gold bumping processes with asymmetric tolerances. In this paper, we propose a new yield index C"_pk^M and derive an approximate distribution of Ĉ"_pk^M. In addition, the lower confidence bounds and critical values are provided for the multiple-line gold bumping processes with asymmetric tolerances. For illustration purposes, a real-world application in a gold bumping factory which is located in the Science-Based Industrial Park in Hsinchu, Taiwan, is presented.