DocumentCode
3609510
Title
Characterization of a Serializer ASIC Chip for the Upgrade of the ATLAS Muon Detector
Author
Jinhong Wang ; Liang Guan ; Ziru Sang ; Chapman, J.W. ; Tiesheng Dai ; Bing Zhou ; Junjie Zhu
Author_Institution
Dept. of Phys., Univ. of Michigan, Ann Arbor, MI, USA
Volume
62
Issue
6
fYear
2015
Firstpage
3242
Lastpage
3248
Abstract
We report on the design of a serializer ASIC to be used in the ATLAS forward muon detector for trigger data transmission. We discuss the performance of a prototype chip covering power dissipation, latency and stable operating line rate. Tests show that the serializer is capable of running at least at 5.76 Gbps with a bit error ratio below 1 ×10- 15, and a power consumption of 200 mW running at 4.8 Gbps. The latency between the start of loading 30 bits into the serializer to the transmission of the first bit from the serializer is measured to be about 6 ns.
Keywords
application specific integrated circuits; nuclear electronics; position sensitive particle detectors; power consumption; trigger circuits; ATLAS forward muon detector; bit error ratio; latency; power consumption; power dissipation; prototype chip performance; serializer ASIC Chip; stable operating line rate; trigger data transmission; Application specific integrated circuits; Detectors; Jitter; Oscilloscopes; Shift registers; ATLAS; Application specific integrated circuits; CMOS; serializer;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.2015.2480855
Filename
7312500
Link To Document