Author_Institution :
Nat. Key Lab. of Sci. & Technol. on Micro/Nano Fabrication, Peking Univ., Beijing, China
Abstract :
Along with extensive applications of through-silicon vias (TSVs) in 3-D systems, such as digital, logic, and memory modules, the accurate modeling of coupling capacitance between the TSVs is becoming indispensable to the signal integrity analysis of the system design. In this paper, the static characteristics of potential, electric field, and charges between signal-ground TSVs in a floating substrate are investigated, and accordingly, the effect of MOS capacitance on the coupling capacitance between signal and ground TSVs is accurately modeled and analyzed for both static and high-frequency situations. Furthermore, the impact of substrate admittance on the capacitance-voltage dependence is explored. Parametric studies are performed to study the effects of different physical and material parameters on the coupling capacitance, which include TSV radius, liner thickness, doping concentration, amount of oxide charges, and work function of TSV filling materials. Based on the proposed model, the nonlinear effect of the coupling capacitance on transient noise is examined and explained.
Keywords :
elemental semiconductors; integrated circuit modelling; silicon; three-dimensional integrated circuits; work function; 3D systems; MOS capacitance; MOS effect; Si; TSV filling materials; TSV radius; capacitance-voltage dependence; coupling capacitance; digital modules; doping concentration; electric field; floating substrate; high-frequency situations; liner thickness; logic modules; material parameters; memory modules; oxide charges; physical parameters; signal integrity analysis; signal-ground TSV; silicon interposers; static characteristics; substrate admittance; transient noise; work function; Capacitance; Doping; Silicon; Substrates; Through-silicon vias; Coupling capacitance; MOS effect; through-silicon vias (TSVs); through-silicon vias (TSVs).;
