COTS-Based High-Performance Computing for Space Applications

Author

Esposito, S. ; Albanese, C. ; Alderighi, M. ; Casini, F. ; Giganti, L. ; Esposti, M.L. ; Monteleone, C. ; Violante, M.

Author_Institution

Politec. di Torino, Turin, Italy

Volume

62

Issue

6

fYear

2015

Firstpage

2687

Lastpage

2694

Abstract

Commercial-off-the-shelf devices are often advocated as the only solution to the increasing performance requirements in space applications. This paper presents the solutions developed in the frame of the European Space Agency´s HiRel program, concluded in December 2014, where a number of techniques proposed in the past 10 years have been used to design a highly reliable system, which has been selected for forthcoming space missions. This paper presents the system architecture, describes performed evaluations, and discusses the results.

Keywords

aerospace computing; parallel processing; COTS-based high-performance computing; European Space Agency; HiRel program; commercial-off-the-shelf devices; performance requirements; space applications; system architecture; Central Processing Unit; Fault tolerance; Single event upsets; Space missions; Central processing unit (CPU); commercial off the shelf (COTS); fault injection; memory encoding; memory protection; single-event upset (SEU); software-implemented fault tolerance (SIFT); space applications; watchdog processor; watchdog timer;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/TNS.2015.2492824

Filename

7348743