Title :
Single-Event Upset Characterization Across Temperature and Supply Voltage for a 20-nm Bulk Planar CMOS Technology
Author :
Kauppila, J.S. ; Kay, W.H. ; Haeffner, T.D. ; Rauch, D.L. ; Assis, T.R. ; Mahatme, N.N. ; Gaspard, N.J. ; Bhuva, B.L. ; Alles, M.L. ; Holman, W.T. ; Massengill, L.W.
Author_Institution :
Inst. for Space & Defense Electron., Vanderbilt Univ., Nashville, TN, USA
Abstract :
Isotropic alpha particle single-event upsets (SEU) in flip-flops are characterized over temperature and voltage supply variations in a 20-nm bulk planar complementary metal-oxide semiconductor (CMOS) process. The decrease of the MOSFET drain current in saturation with respect to increased temperature and reduced supply voltage explains the increased SEU sensitivity of the flip-flop designs. Experimental SEU cross sections from isotropic Americium-241, 5.4-MeV alpha particle show irradiation increases by 30 × on average, and up to orders of magnitude, as a result of increased device temperature and reduced supply voltage.
Keywords :
CMOS logic circuits; MOSFET; americium; flip-flops; logic design; radiation hardening (electronics); Am; CMOS process; MOSFET drain current; SEU cross sections; SEU sensitivity; bulk planar CMOS technology; complementary metal-oxide semiconductor; device temperature; flip-flop designs; isotropic Americium-241; isotropic alpha particle single-event upsets; single-event upset characterization; size 20 nm; CMOS technology; Digital integrated circuits; Electronic circuits; Flip-flops; MOSFET; Single event transients; Single event upsets; Complementary metal-oxide semiconductor (CMOS); MOSFETs; digital integrated circuits; electronic circuits; flip-flop; reliability; single-event effects; single-event modeling; single-event transients; single-event upset; temperature effects;
Journal_Title :
Nuclear Science, IEEE Transactions on
DOI :
10.1109/TNS.2015.2493886
